1. Field of the Invention
The present invention generally relates to a method for forming a self-aligned mask with respect to a previously formed critical feature on a substrate. In particular, the present invention is directed to a method for forming a non-critical mask layer with respect to a previously formed critical feature and determining if the non-critical mask layer is self-aligned with the previously formed critical feature to serve as a self-aligned overlay mark at the same time.
2. Description of the Prior Art
Fabrication of silicon based memory chips usually involves multiple photolithographic processing steps. In each of these steps, a particular pattern with certain fixed dimensions is printed on the wafer. After all of the particular patterns are processed, a complete working circuit is created. It is very critical that each particular pattern is overlaid on top of a prior reference particular pattern within a certain tolerance, so that the electronic circuit functions. The magnitude of this tolerance is referred to as an overlay specification.
A registration box is used to measure the overlay between one layer and another. The registration box usually has 2 components for an overlay measurement: an example would be a printed outer box locating a prior reference layer, and a printed inner box locating the current layer. The overlay measurement is made by measuring the distance between the inner box and outer box in both the Y direction and the X direction. This distance is then compared to an ideal reference, so the layer to layer overlay is calculated.
As mentioned before, a registration box measures how well one layer is overlaid on top of the other. The purpose of each measurement is to make sure that the overlay specification is met.
In most cases, there are regions of different features on a substrate. For example, on a substrate there may be an array region with denser array features and a peripheral region with less dense peripheral features. Hence, the array features and the peripheral features are different in nature. In particular, the array features are generally smaller than the peripheral features in dimension. For instance electrical devices in the periphery region can be larger in size than the electrical devices in the array region.
Moreover, while the peripheral features can be formed by the ordinary photolithographic techniques since they have larger dimension, the array features instead usually have to be formed using the pitch multiplication techniques. It is challenging to keep each different feature from interfering with one another in the manufacturing process.
After the array features are formed using the pitch doubling process on the substrate, there are parts of the substrate, such as the peripheral region, which need to be protected by a mask. However, the previous resist was striped off after a previous etching step. There are also certain unwanted features formed during the pitch doubling process. These features need to be removed or at least masked off.
In a process where a mask pattern is required to be formed in close proximity to the array features, the problem arises of how to measure the location of critical features such as the array features formed of a denser line/space patterns without the measurement being impacted by the adjacent non-critical pattern of the mask.
Accordingly, there is a need for methods of forming a mask on a substrate which creates a self-aligned overlay mark without jeopardizing the alignment precision of a previously formed critical feature, especially in conjunction with the pitch multiplication techniques.